🚧 WIP
This commit is contained in:
Jonas Bengtsson
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"""Plain-text tracing of Modbus transactions (verbose/debug mode).
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Formats decoded requests and responses in human-readable form, e.g.::
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REQ txn=0x0001 unit=1 FC03 Read Holding Registers
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addr=0x2002 count=1
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RSP txn=0x0001 unit=1 FC03 -> 1 reg: [0x1234]
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EXC txn=0x0001 unit=1 FC03 -> 0x02 Illegal Data Address (addr=0x0100)
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Register addresses are annotated with their WAGO 750-362 meaning
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(process image areas, read-back mirrors, configuration/constant
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registers) so traces are directly readable during FAT bench work.
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"""
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from __future__ import annotations
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from . import pdu as pdu_mod
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from .mbap import MbapHeader
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# --- function code names -------------------------------------------------------
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_FC_NAMES = {
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0x01: "Read Coils",
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0x02: "Read Discrete Inputs",
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0x03: "Read Holding Registers",
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0x04: "Read Input Registers",
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0x05: "Write Single Coil",
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0x06: "Write Single Register",
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0x0B: "Get Comm Event Count",
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0x0F: "Write Multiple Coils",
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0x10: "Write Multiple Registers",
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0x16: "Mask Write Register",
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0x17: "Read/Write Multiple Registers",
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}
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_EXCEPTION_NAMES = {
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0x01: "Illegal Function",
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0x02: "Illegal Data Address",
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0x03: "Illegal Data Value",
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0x04: "Slave Device Failure",
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0x05: "Acknowledge",
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0x06: "Server Busy",
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0x08: "Memory Parity Error",
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0x0A: "Gateway Path Unavailable",
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0x0B: "Gateway Target Failed",
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}
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# --- WAGO register-map annotations (750-362 manual §11.2.4/§11.2.5) -------------
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def describe_address(address: int, count: int = 1, *, write: bool = False) -> str:
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"""Annotate a word address with its WAGO meaning, if any.
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`write` selects the mapping per the manual: Table 119 (reads) maps
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0x0000-0x00FF to the INPUT area (%IW), while Table 120 (writes) maps
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the same range to the OUTPUT area (%QW); mirrors swap accordingly.
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"""
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end = address + count - 1
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def area(name: str, note: str) -> str:
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if count == 1:
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return f"{name} {note}"
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return f"{name} {note} [{address:#06x}..{end:#06x}]"
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if write:
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if address <= 0x00FF:
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return area("output area 1", f"(%QW{address})")
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if address <= 0x01FF:
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return "illegal area 0x0100-0x01FF"
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if address <= 0x02FF:
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return area("output area 1 mirror", f"(%QW{address - 0x0200})")
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if address <= 0x0FFF:
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return "illegal area 0x0300-0x0FFF"
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if address <= 0x2FFF:
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return f"config regs {address:#06x}" if address < 0x2000 \
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else f"config/constant regs {address:#06x}"
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if address <= 0x5FFF:
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return "illegal area 0x3000-0x5FFF"
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if address <= 0x62FB:
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return area("output area 2", f"(%QW{256 + address - 0x6000})")
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if address <= 0x6FFF:
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return "illegal area 0x62FC-0x6FFF"
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if address <= 0x72FB:
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return area("output area 2 mirror", f"(%QW{256 + address - 0x7000})")
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return "illegal area 0x72FC-0xFFFF"
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if address <= 0x00FF:
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return area("input area 1", f"(%IW{address})")
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if address <= 0x01FF:
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return "illegal area 0x0100-0x01FF"
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if address <= 0x02FF:
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return area("output area 1 read-back", f"(%QW{address - 0x0200})")
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if address <= 0x0FFF:
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return "illegal area 0x0300-0x0FFF"
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if address <= 0x2FFF:
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return f"config/constant regs {address:#06x}"
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if address <= 0x5FFF:
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return "illegal area 0x3000-0x5FFF"
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if address <= 0x62FB:
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return area("input area 2", f"(%IW{256 + address - 0x6000})")
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if address <= 0x6FFF:
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return "illegal area 0x62FC-0x6FFF"
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if address <= 0x72FB:
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return area("output area 2 read-back", f"(%QW{256 + address - 0x7000})")
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return "illegal area 0x72FC-0xFFFF"
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def describe_bit_address(address: int, count: int = 1) -> str:
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"""Annotate a bit address (digital channel number semantics)."""
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end = address + count - 1
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if address < 0x0200:
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base = f"D/I {address}..{end} area 1" if count > 1 else f"channel {address} area 1"
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elif address < 0x0400:
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ch = address - 0x0200
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base = (f"DO {ch}..{end - 0x0200} area 1 read-back"
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if count > 1 else f"DO {ch} area 1 read-back")
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elif address >= 0x9000 and address <= 0x95F7:
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ch = 513 + address - 0x9000
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base = (f"DO {ch}..{ch + count - 1} area 2 read-back"
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if count > 1 else f"DO {ch} area 2 read-back")
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elif address >= 0x8000 and address <= 0x85F7:
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ch = 513 + address - 0x8000
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base = (f"DI {ch}..{ch + count - 1} area 2"
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if count > 1 else f"DI {ch} area 2")
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else:
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base = "illegal bit area"
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return base
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def _fc_name(fc: int) -> str:
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return _FC_NAMES.get(fc, f"Unknown ({fc:#04x})")
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def _exc_name(code: int) -> str:
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return _EXCEPTION_NAMES.get(code, f"Unknown ({code:#04x})")
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def _prefix(header: MbapHeader) -> str:
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return f"txn=0x{header.transaction_id:04X} unit={header.unit_id}"
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# --- request formatting ---------------------------------------------------------
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def format_request(header: MbapHeader, request: pdu_mod.Request) -> str:
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"""One- or two-line plain-text description of a decoded request."""
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fc = request.function_code
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head = f"REQ {_prefix(header)} FC{fc:02X} {_fc_name(fc)}"
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r = request
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if isinstance(r, pdu_mod.ReadRequest):
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is_bits = fc in (pdu_mod.FC_READ_COILS, pdu_mod.FC_READ_DISCRETE_INPUTS)
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where = (describe_bit_address(r.address, r.count) if is_bits
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else describe_address(r.address, r.count))
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return f"{head}\n addr={r.address:#06x} count={r.count} [{where}]"
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if isinstance(r, pdu_mod.WriteSingleCoilRequest):
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return (f"{head}\n addr={r.address:#06x} "
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f"value={'ON' if r.value else 'OFF'} "
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f"[{describe_bit_address(r.address)}]")
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if isinstance(r, pdu_mod.WriteSingleRegisterRequest):
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return (f"{head}\n addr={r.address:#06x} value={r.value:#06x} "
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f"[{describe_address(r.address, write=True)}]")
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if isinstance(r, pdu_mod.WriteMultipleCoilsRequest):
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vals = "".join("1" if v else "0" for v in r.values)
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return (f"{head}\n addr={r.address:#06x} values={vals} "
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f"[{describe_bit_address(r.address, len(r.values))}]")
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if isinstance(r, pdu_mod.WriteMultipleRegistersRequest):
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vals = ", ".join(f"{v:#06x}" for v in r.values)
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return (f"{head}\n addr={r.address:#06x} values=[{vals}] "
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f"[{describe_address(r.address, len(r.values), write=True)}]")
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if isinstance(r, pdu_mod.MaskWriteRegisterRequest):
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return (f"{head}\n addr={r.address:#06x} and={r.and_mask:#06x} "
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f"or={r.or_mask:#06x} [{describe_address(r.address, write=True)}]")
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if isinstance(r, pdu_mod.ReadWriteMultipleRegistersRequest):
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return (f"{head}\n read addr={r.read_address:#06x} count={r.read_count} "
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f"[{describe_address(r.read_address, r.read_count)}] | "
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f"write addr={r.write_address:#06x} values={list(r.values)} "
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f"[{describe_address(r.write_address, write=True)}]")
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if isinstance(r, pdu_mod.GetCommEventCountRequest):
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return head
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return f"{head} (no formatter)" # pragma: no cover
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def format_response(header: MbapHeader, response: pdu_mod.Response) -> str:
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"""Plain-text description of a response or exception."""
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prefix = f"{_prefix(header)}"
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if isinstance(response, pdu_mod.ExceptionResponse):
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return (f"EXC {prefix} FC{response.function_code:02X} "
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f"-> code=0x{response.exception_code:02X} "
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f"{_exc_name(response.exception_code)}")
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resp = response
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if isinstance(resp, pdu_mod.ReadResponse):
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if resp.bits:
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return (f"RSP {prefix} FC{resp.function_code:02X} "
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f"-> {len(resp.bits)} bits: "
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f"{''.join('1' if b else '0' for b in resp.bits)}")
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return (f"RSP {prefix} FC{resp.function_code:02X} "
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f"-> {len(resp.registers)} regs: "
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f"[{', '.join(f'{v:#06x}' for v in resp.registers)}]")
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if isinstance(resp, pdu_mod.WriteSingleCoilResponse):
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return f"RSP {prefix} FC{resp.function_code:02X} -> echo"
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if isinstance(resp, pdu_mod.WriteSingleRegisterResponse):
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return f"RSP {prefix} FC{resp.function_code:02X} -> echo"
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if isinstance(resp, pdu_mod.WriteMultipleResponse):
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return (f"RSP {prefix} FC{resp.function_code:02X} "
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f"-> wrote {resp.count} items")
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if isinstance(resp, pdu_mod.MaskWriteRegisterResponse):
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return f"RSP {prefix} FC{resp.function_code:02X} -> echo"
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if isinstance(resp, pdu_mod.GetCommEventCountResponse):
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return (f"RSP {prefix} FC{resp.function_code:02X} "
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f"-> events={resp.event_count}")
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return f"RSP {prefix} -> (no formatter)" # pragma: no cover
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def format_raw(header: MbapHeader, pdu: bytes) -> str:
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"""Raw-frame line for structurally invalid PDUs (cannot be decoded)."""
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hexed = pdu.hex(" ") if pdu else "(empty)"
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return f"RAW {prefix_stub(header)} PDU[{len(pdu)}]: {hexed}"
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def prefix_stub(header: MbapHeader) -> str:
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return _prefix(header)
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